Details

Abstrakt in Englisch

Civilian automotive radar technology is a hot topic with the growing demand for safe driving and the exploration of autonomous driving technolo- gies. The need for higher-performance radars drives greatly the research on millimeter-wave radars, especially the essential millimeter-wave integrated circuits. This thesis focuses on the analysis and design of integrated circuit blocks for civilian automotive radar applications.

To prove the concepts of the millimeter wave circuits for civilian automotive radar in the 77 GHz/79 GHz frequency band, chips were implemented in a 22 nm FD-SOI CMOS technology. The realization of millimeter-wave circuits with this technology is a major challenge. More complex circuit structures are required to improve state-of-the-art performance in the deep-scaled 22 nm CMOS technology compared to other CMOS technologies with larger gate lengths. The third-order distortion cancellation concept was studied and extended with back-gate control, especially for the low-noise amplifier design in an FD-SOI CMOS technology. Based on the study, highly linear low-noise amplifiers are designed and implemented with the 22 nm FD-SOI CMOS technology. The high linearity ensures a high tolerance on the spillover from transmitter to receiver, making the proposed circuits more applicable to civilian automotive radar applications. The state-of-the-art input referred 1 dB compression point (iP1dB ) for low-noise amplifiers operating in the 77 GHz/79 GHz frequency band is improved to around −4 dBm by these works. To increase the linearity at the receiver side in a radar system, the passive ring structure was investigated to realize the frequency down-conversion mixer. The presented down-conversion mixer and low-noise amplifier are expanded into an in-phase and quadra- ture receiver. Experimental results showed very good performances with iP1dB around −9 dBm and double-sideband noise figure of 8 dB. For the circuit blocks at the transmitter side, a 79 GHz power amplifier is designed. The capacitive neutralization concept was studied and utilized in this power amplifier design to increase the gain and reverse isolation of the ampli- fier units. A binary-phase modulator is further integrated with the power amplifier to enable binary-phase modulation for radar applications. This design is the first reported proof-of-concept design of a binary phase modulated transmitter in a 22 nm technology. It showed a very balanced performance and achieved the highest figure of merit defined by the International Technology Roadmap for Semiconductors at the time of the work.

Besides the study of circuit blocks operating in the 77 GHz/79 GHz band, power amplifiers are investigated for the ISM 24 GHz frequency band radars. For the broadband radar applications in this frequency band, a distributed power amplifier circuitry is investigated, which is well-known for the bandwidth but with low efficiency. The design concept for a distributed power amplifier is extended by this work. Supported by theoretical analysis, the number of stages and forward gain of the distributed power amplifier can be optimized, which in turn improves the efficiency of the whole circuit. To prove the concept, the distributed power amplifiers were implemented in a 130 nm SiGe technology. The designed circuits improved the state-of-the-art regarding output power and gain for the silicon-based designs with comparable efficiency at that time. It is worth noting that with integrated dc feedlines, no external bias-tee is required for the designed distributed power amplifiers, which strongly increases the integration ability. The presented distributed power amplifiers have been successfully implemented in several systems.